Cambridge International AS & A Level · 21 · structured
Half-wave, full-wave and smoothing
Half-wave, full-wave and smoothing · Original GioPhysics question with a detailed, mark-by-mark answer guide.
- Demand
- demanding
- Marks
- 11
- Topics
- 3
- Answer
- Complete
An ideal sinusoidal source has V_s=6.0 sin(100πt) V. A load resistor is first supplied through a single ideal series diode oriented to pass positive source half-cycles. It is later supplied through an ideal full-wave rectifier. Assume no smoothing until part (c).
- (a)
Sketch the input, half-wave output and full-wave output for 0–40 ms on aligned time axes, labelling zero and peak voltage. Distinguish which negative half-cycles are blocked and which are inverted.
4 marks - (b)
Explain the single diode's action in each half-cycle in terms of forward and reverse bias.
2 marks - (c)
State where one capacitor is connected to smooth the full-wave output. Sketch its approximate load-voltage trace and explain charging, discharge and the separate effects of increasing C or increasing load resistance R.
5 marks
Ready to self-mark?Reveal the detailed answer guide
(a)
Sketch the input, half-wave output and full-wave output for 0–40 ms on aligned time axes, labelling zero and peak voltage. Distinguish which negative half-cycles are blocked and which are inverted.
List the given quantities with units, identify the required quantity, write the governing relationship before substituting, and keep extra digits until the final line so rounding does not distort the result.
- 1
The input repeats every T=1/50=20 ms and reaches ±6.0 V.
- 2
The half-wave trace follows the positive input lobes and remains zero for each negative half-cycle.
- 3
The full-wave trace is |V_s|, so every negative input lobe is inverted above zero.
- 4
Use matching axes and label 0,10,20,30,40 ms; peaks remain 6.0 V for ideal diodes.
(b)
Explain the single diode's action in each half-cycle in terms of forward and reverse bias.
Identify what the question is testing, organise the response into distinct mark-earning points, and make every conclusion traceable to a physical principle or to the evidence supplied.
- 1
When the input has the passing polarity the diode is forward biased, completing the load circuit.
- 2
The reversed polarity reverse biases the diode and prevents current in the ideal model.
(c)
State where one capacitor is connected to smooth the full-wave output. Sketch its approximate load-voltage trace and explain charging, discharge and the separate effects of increasing C or increasing load resistance R.
Identify what the question is testing, organise the response into distinct mark-earning points, and make every conclusion traceable to a physical principle or to the evidence supplied.
- 1
Connect the capacitor in parallel with the load, with correct polarity if it is polarised.
- 2
It charges when the rectifier voltage exceeds the capacitor voltage, generally near input peaks.
- 3
Between peaks the diodes cease conducting and the capacitor discharges through R, sustaining positive load voltage.
- 4
Sketch a rapid top-up near each full-wave peak followed by a curved fall, not a flat perfectly constant line.
- 5
Larger C gives less voltage loss for a given charge drawn; larger R draws less current. Either increases RC and reduces the inter-peak voltage fall.
Complete marking guidance
Use these worked steps alongside the part-by-part answers. They explain the method and mark allocation; they do not add extra marks.
- (a) The input repeats every T=1/50=20 ms and reaches ±6.0 V.
- (a) The half-wave trace follows the positive input lobes and remains zero for each negative half-cycle.
- (a) The full-wave trace is |V_s|, so every negative input lobe is inverted above zero.
- (a) Use matching axes and label 0,10,20,30,40 ms; peaks remain 6.0 V for ideal diodes.
- (b) When the input has the passing polarity the diode is forward biased, completing the load circuit.
- (b) The reversed polarity reverse biases the diode and prevents current in the ideal model.
- (c) Connect the capacitor in parallel with the load, with correct polarity if it is polarised.
- (c) It charges when the rectifier voltage exceeds the capacitor voltage, generally near input peaks.
- (c) Between peaks the diodes cease conducting and the capacitor discharges through R, sustaining positive load voltage.
- (c) Sketch a rapid top-up near each full-wave peak followed by a curved fall, not a flat perfectly constant line.
- (c) Larger C gives less voltage loss for a given charge drawn; larger R draws less current. Either increases RC and reduces the inter-peak voltage fall.
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